Nvidia JETSON NANO - CSI Design Guidelines; Table 8-4. MIPI CSI Signal Connections; Table 8-5. Miscellaneous Camera Connections

MIPI CSI Video Input
NVIDIA Jetson Nano DG-09502-001_v2.1 | 50
8.1 CSI Design Guidelines
CSI and DSI use the MIPI D-PHY for the physical interface. The routing and connection
requirements are found in the DSI section (Section 7.1),
Table 8-4. MIPI CSI Signal Connections
Module Pin Name Type Termination Description
CSI[4:2,0]_CLK_N/P I See Note CSI Differential Clocks. Connect to clock pins of camera. See Table 8-3
for details
CSI[3:0]_D[1:0]_N/P
CSI4_D[3:0]_N/P
I/O See Note CSI Differential Data Lanes: Connect to data pins of camera. See Table
8-3 for details
Note: Depending on the mechanical design of the platform and camera modules, ESD protection may be necessary. In addition, EMI
control may be needed. Both are shown in Figure 8-1. Any EMI/ESD solution must be compatible with the frequency required by the
design.
Table 8-5. Miscellaneous Camera Connections
Module Pin Name Type Termination Description
CAM_I2C_CLK
CAM_I2C_DAT
O
I/O
2.2kΩ pull-ups VDD_3V3_SYS (on Jetson
Nano). See note related to EMI/ESD in
Table 8-4.
Camera I2C Interface: Connect to I2C SCL and SDA
pins of imager. The CAM_I2C interface is connected to
the power monitor device on the module which uses I2C
address 7’h40.
CAM[1:0]_MCLK O 120Ω bead in series (on Jetson Nano)
See note related to EMI/ESD under
MIPI CSI Signal Connections table.
Camera Master Clocks: Connect to camera reference
clock inputs.
CAM[1:0]_PWDN O Camera Power Control signals (or GPIOs [1:0]):
Connect to power down pins on camera(s).