General Routing Guidelines
NVIDIA Jetson Nano DG-09502-001_v2.1 | 72
15.2 Routing Guideline Format
The routing guidelines have the following format to specify how a signal should be routed.
Breakout traces are traces routed from BGA ball either to a point beyond the ball array, or
to another layer where full normal spacing guidelines can be met. Breakout trace delay
limited to 500 mils (1/1000 of an inch) unless otherwise specified.
After breakout, signal should be routed according to specified impedance for differential,
single-ended, or both (for example: HDMI). Trace spacing to other signals also specified.
Follow max and min trace delays where specified. Trace delays are typically shown in
“mm” (millimeter) or “in” (inch) or in terms of signal delay in “ps” (pico-seconds) or both.
• For differential signals, trace spacing to other signals must be larger of specified ×
dielectric height or inter-pair spacing.
• Spacing to other signals/pairs cannot be smaller than spacing between
complementary signals (intra-pair).
• Total trace delay depends on signal velocity which is different between outer
(microstrip) and inner (stripline) layers of a PCB.
15.3 Signal Routing Conventions
Throughout this design guide, the following signal routing conventions are used:
SE Impedance (/ Diff Impedance) at x Dielectric Height Spacing
• SE impedance of trace (along with diff impedance for diff pairs) is achieved by spacing
requirement. Spacing is multiple of dielectric height. Dielectric height is typically
different for microstrip and stripline. Note: 1 mil = 1/1000th of an inch.
Note: Trace spacing requirement applies to SE traces or differential pairs to other SE traces or
differential pairs. It does not apply to traces making up a differential pair. For this case,
spacing/trace widths are chosen to meet differential impedance requirement.
15.4 General Routing Guidelines
Pay close attention when routing high speed interfaces, such as HDMI/DP, USB 3.0, PCIe or
DSI/CSI. Each of these interfaces has strict routing rules for the trace impedance, width,
spacing, total delay, and delay/flight time matching. The following guidelines provide an
overview of the routing guidelines and notations used in this design guide.
Controlled Impedance
Each interface has different trace impedance requirements and spacing to other traces. It
is up to designer to calculate trace width and spacing required to achieve specified SE and
Diff impedances. Unless otherwise noted, trace impedance values are ±15%.
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