139
Timing Chart
Cycle Start BIt
(n+1 bit 02)
Program execution
Forced Block End BIt
(n+1 bit 04)
Program Example
DIFU(13) R1
n+1
04
n+1 04
R1 n+11 04
Auxiliary Area Bit
OUT
(Ends the block)
Forced Block
End condition
Memory Run
Flag
Forced Block
End Bit
6-5-5 Word n+1 Bit 05: Pause Bit (Task 1)
This bit is used to temporarily pause program execution; it is valid only when the
mode is set to automatic mode.
When this bit is turned ON, the block being executed will be interrupted and any
axes that are operating will be decelerated to a stop. Keep the Pause Bit ON until
the Memory Run Flag goes OFF. Program execution can be restarted from the
interrupted block by turning ON the Cycle Start BIt.
Operation of the Cycle Start Bit is disabled as long as the Pause Bit is ON. (The
program won’t be executed when the Cycle Start Bit is turned ON if the Pause Bit
is ON.)
The Pause Bit has a lower priority than the Forced Block End Bit (n+1 bit 04). If
both of these bits go ON at the same time, the forced block end command will be
executed.
Keep this bit ON until the memory operation is turned OFF.
The Pause Bits for tasks 2 (bit 05 in word n+3) operate in the same way.
Signal The Pause Bit settings have the following functions.
Signal Function
↑ (OFF-to-ON) Pauses execution of the block being executed.
ON As long as the bit remains ON, the program won’t be executed
when the Cycle Start Bit goes ON.
Interface Bit Specifics
Section 6-5
To Next Page
Loading...
Need help?
General
