134
Word PageDescriptionBit
I+19 00 to 15 Task 1 teaching execution address 0000 to 1999
(4-digit BCD)
When the teaching address function at bit 09 of word
n+1 is executed with task 1, the first address of the
position data will be output.
This address is refreshed whenever teaching is
executed.
x10
0
x10
1
x10
2
x10
3
142
I+20 00 to 15 Task 2 execution program no. 0000 to 0999 (4-digit
BCD)
The number of the program being executed or on hold
with task 2 will be output.
x10
0
x10
1
x10
2
0
---
I+21 00 to 15 Task 2 execution block no. 0000 to 0999 (4-digit BCD)
The number of the block being executed or on hold
with task 2 will be output.
x10
0
x10
1
x10
2
0
---
I+22 00 to 15 Task 2 teaching execution address 0000 to 1999
(4-digit BCD)
When the teaching address function at bit 09 of word
n+3 is executed with task 2, the first address of the
position data will be output.
This address is refreshed whenever teaching is
executed.
x10
0
x10
1
x10
2
x10
3
142
6-5 Interface Bit Specifics
This section provides details on the functions of the interface bits in the IR area.
The timing chart and ladder program examples use the bits and words for task 1
and the X-axis.
6-5-1 Word n+1 Bit 01: Automatic/Manual Mode Bit (Task 1)
Bits 00 to 10 of word n+3 are the control bits of task 2. The control bits of task 1
are explained below. There is no difference in function between the control bits
of tasks 1 and 2 although their words are different.
This bit determines the mode for task 1. Turn this bit ON to specify automatic
mode, OFF to specify manual mode. In manual mode, commands such as
manual origin search, manual origin return, and jogging are possible. In auto-
matic mode, the MC program can be executed.
When the mode is switched from manual to automatic, any operating axes will
decelerate to a stop. When the mode is switched from automatic to manual, the
program will be stopped if it is operating. The program will be restarted from the
block where it was stopped if the mode is switched back to automatic and the
program is restarted.
Interface Bit Specifics
Section 6-5
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