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R & S E K 8 9 5 / R & S E K 8 9 6
User Manual
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Fault Recognition During Operation (BIT)
Subsequently, a 100>kHz test signal instead of
the antenna signal is fed into the receive path
and the receiver is set to a receive frequency of
100 kHz. The processor evaluates the BIT mess>
ages (BIT criterion) from the HF unit (DC volt>
age of the IF amplifier for the 2nd IF) as well as
the CM messages from the synthesizer (phase>
locked loops and oscillator level of the 2:1
divider) and the IF / AF processor (oscillator le>
vels of various dividers, phase>locked loop, 20>
MHz signal, watchdog of the DSP and overload
at the HF input).
Defective modules are indicated by the mess>
age NOGO. If more than one module is defec>
tive, indication of the other defective ones is
possible by actuation of softkey MORE (R&S
EK!895) or key MORE (R&S EK 896).
If the message SYNTH NOGO is displayed,
f replace synthesizer acc. to 4.3.6.
If the message RF UNIT NOGO is displayed,
f replace HF unit acc. to 4.3.7.
If the message IF / AF NOGO is displayed,
f replace IF / AF processor acc. to 4.3.9.
If the message PROC UNIT NOGO is displayed,
f replace modules one after the other until
fault is eliminated. If the fault cannot be
remedied by this measure, send the entire
VLF>HF receiver for repair.
If the message IF CONV NOGO is displayed,
f replace optional IF Converter R&S UX 895
acc. to 4.3.13.
When the BIT has been successful, the display
BIT GO will appear.
Example: synthesizer defective
MORE
for EK 895
for EK 896
6164.0717.02_01
> 4.12 >
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