C-6 Sun Blade 150 Service Manual • June 2002
C.5 Motherboard Components
This section describes all the Sun Blade 150 system components. Most of the devices
are connected through the PCI interface that is supported by the CPU. The CPU has
one 32-bit 33 MHz PCI bus. The PCI bus from the CPU is 3.3V. All the PCI devices
on the motherboard are 3.3V devices. The 5 V and 3.3 VPCI cards are supported
through plug-in slots on the secondary bus of the PCI to PCI bridge. The PCI bus
runs at 33 Mhz.
This section discusses the following topics:
■ Section C.5.1, “CPU” on page C-6
■ Section C.5.2, “IChip2 ASIC” on page C-7
■ Section C.5.3, “SouthBridge ASIC” on page C-7
■ Section C.5.4, “PCI Graphics” on page C-10
■ Section C.5.5, “PCIO-2.x ASIC” on page C-10
■ Section C.5.6, “PCI to PCI Bridge ASIC” on page C-11
■ Section C.5.7, “Flash PROM” on page C-11
■ Section C.5.8, “Smart Card Interface” on page C-12
■ Section C.5.9, “NVRAM/TOD” on page C-13
C.5.1 CPU
The system CPU is the UltraSPARC IIi processor. The CPU is a high-performance,
highly-integrated superscalar processor implementing the SPARC-V9 64-bit RISC V9
architecture. A PCI bus controller (rev. 2.1 compatible) and a memory management
unit that supports synchronous DRAM are integrated into the unit. The CPU
integrates the L2 cache megacell, which contains a total of 512 Kbytes of L2 cache.
The CPU uses a pipelined L2 cache which requires the L2 cache to sustain the
bandwidth of two-cycle throughput.
The CPU characteristics and associated features include:
■ SPARC-V9 architecture compliant
■ Binary compatibility with all SPARC application code
■ 16 Kbyte nonblocking data cache
■ 16 Kbyte instruction cache with single cycle branch following
■ Power management
■ PCI interface
■ Memory management unit (MMU) 4 Gigabyte addressable
Note – Both POST and OpenBoot PROM report the CPU as an UltraSPARC IIe
processor. The CPU in your system is an UltraSPARC IIi processor.
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