C-22 Sun Blade 150 Service Manual • June 2002
SDRAM DIMM modules implement the serial presence detect (SPD) mechanism. A
serial EEPROM on the DIMM module contains data programmed by the DIMM
manufacturers that identifies the module type and various SDRAM organization and
timing parameters. This information can be accessed through the system
management bus (I2C bus).
C.9.3.1 DIMM Memory Addressing
TABLE C-6 shows the DIMM Addressing.
For troublehooting information see Section 4.5, “DIMM Failure” on page 4-5.
C.10 Address Mapping
This section provides the overview of address partitioning and software-visible
registers and their respective functionality. The physical address associated with
each of these registers is listed, along with a brief description of the register. For
further details on the description and functionality of the registers and chips, refer to
the respective chip specification.
■ Section C.10.1, “Port Allocations” on page C-22
■ Section C.10.2, “PCI Address Assignments” on page C-23
C.10.1 Port Allocations
The following table lists the system port allocations. The CPU divides the physical
address space among:
■ Main memory (DRAM)
TABLE C-6 DIMM Physical Memory Address
DIMM Slot Physical Address Range DIMM Starting Address (Hex)
DIMM0 (U2)
DIMM1 (U3)
0 to 512MB (0 to 0.5GB)
512MB to 1024MB (0.5GB to 1GB)
0X00000000
0X40000000
DIMM2 (U4)
DIMM3 (U5)
1024MB to 1536MB (1GB to 1.5GB)
1536MB to 2048MB (1.5GB to 2GB)
0X80000000
0XC0000000
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