Appendix C Functional Description C-23
■ PCI (which is further subdivided into the primary PCI bus (PCI-A) and the
secondary PCI bus (PCI-B bus) when the APB ASIC is used
C.10.2 PCI Address Assignments
The following table lists the PCI address assignments.
C.10.2.1 PCI Bus A Address Assignments
PCI bus A has all the PCI slots and the address is programmable by the OpenBoot
PROM.
TABLE C-7 Port Allocations
Address Range in
PA<40:0> Size Port Access Access Type
0x000.0000.0000 -
FFFF.FFFF
4 Gbyte Main memory Cacheable
0x001.0000.000 -
0x1FF.FFFF.FFFF
Do not use Undefined Cacheable
0x1FC.0000.0000 -
0x1FD.FFFF.FFFF
8 Gbytes UPA graphics Noncacheable
0x1FE.0000.0000 -
0x1FF.FFFF.FFFF
8 Gbytes CPU IO Noncacheable
TABLE C-8 PCI Address Assignments
Address Range in PCI Address Size PCI Space Addressed Notes
0x8000.0000 - 0xBFFF.FFFF 1 Gbyte Primary PCI DVMA
space
CPU DVMA register (equals 0x30)
0x4000.0000 - 0x7FFF.FFFF 1 Gbyte PCI bus A memory
space
PCI slots APB ASIC register (equals 0xc)
0x40.0000 - 0x7f.ffff 4 Mbytes PCI bus A I/O space PCI slots
0x0000.0000 - 0x3FFF.FFFF
0xC000.0000 - 0xFFFF.FFFF
2 Gbytes PCI bus B memory
space
On-board PCI bus
APB ASIC B register
(equals 0xc3)
0x00.0000 - 0x3f.FFFF
0xC0.0000 - 0xFF.FFF
8 Mbytes PCI bus B I/O space
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