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Sun Microsystems SUN BLADE 150 - Page 211

Sun Microsystems SUN BLADE 150
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Glossary-3
LAN Local area network.
LED Light-emitting diode.
MAC Media access controller.
Mbyte Megabyte.
MBps Megabytes per second.
Mbps Megabits per second.
MCU Memory controller unit.
MHz Megahertz.
MII Media independent interface.
MQFP Metric quad flat package
ns Nanosecond.
NVRAM Nonvolatile random access memory. Stores system variables used by the boot
PROM. Contains the system host ID number and Ethernet address.
OpenBoot PROM A routine that tests the network controller, diskette drive system, memory,
cache, system clock, network monitoring, and control registers.
PCI Peripheral component interconnect. A high-performance 32- or 64-bit-wide bus
with multiplexed address and data lines.
PCIO PCI-to-EBus/Ethernet controller. An ASIC that bridges the PCI bus to the
EBus, enabling communication between the PCI bus and all miscellaneous I/O
functions, as well as the connection to slower on-board functions.
PCMCIA Personal Computer Memory Card International Association.
PID Process ID.
POR Power-on reset.
POST Power-on self-test. A series of tests that verify motherboard components are
operating properly. Initialized at system power-on or when the system is
rebooted.
RAMDAC RAM digital-to-analog converter. An ASIC responsible for direct interface to
3DRAM. Also provides on-board phase-lock loop (PLL) and clock generator
circuitry for the pixel clock.
RAS Row address select.
RC Resistive-capacitive.
RISC Reset, interrupt, scan, and clock. An ASIC responsible for reset, interrupt, scan,
and clock.

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