SDI7 module theory of operation
For logo overla
y, the frame picture system is used, but only for a portion of the
image. The user logo information is read from the DDR memory, and blended
with the test signal information.
The circle and text overlay functions are generated from the SRAM for each
channel. This data is blended with the active portion of the test signal o r frame
picture information to produce the combined s ignal information.
Clocks and frames
The mainframe provides three frame pulse signals. The actual frame signal used
is the appropriate one for the rate of the signal being generated. The selected input
frame resets the counters in the FPGA, establishing the correct video timing.
The mainframe also provides a 54 MHz clock for generator mode. This 54 MHz
clock drives a DDS in the FPGA to create a digitized sine wave, which is then
applied
to the flexible generator clock circuit. Depending on the output format
the flexible clock output is at either 148.5 MHz or 148.35 MHz. This clock is fed
back to the FPGA to drive the generator core functions, and sent to the FPGA
serializer clock inputs and the trigger output multiplexer.
The 54 MHz input clock also registers the input frame pulse. After it is registered
at 54 MHz it needs to cross to the 148.5 MHz domain. For this to work
deterministically the phase of the two clocks is automatically controlled. The
status of this automatic control system is shown in the module diagnostic menu as
DDS0
phase (channel 1) and DDS1 phase (channel 2).
Output boards
Trigger output
Th
e Trigger Output board provides a trigger output, which the user can select to
be the active pixel clock, the system clock, or a pulse at either line or field rate.
The output is 50 Ω, to drive typical oscilloscope inputs.
SDI output
T
he two SDI Output boards (one for each output channel) take two channels from
the FPGA serializers and buffers them to drive 75 Ω cable. The output level is set
by non-volatile electronic potentiometers on the output board, so the calibration is
captured in the board.
TG8000 Multiformat Test Signal Generator Service Manual 14–11