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Tektronix TG8000 Service Manual

Tektronix TG8000
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Mainframe troubleshooting
Table 2-3: Slot diagnostics error codes (cont.)
Error
code Description Troubleshooting actions
ACLK/MCLK test
0x9
MCLK test failed If the value read from the MCLK count register is 0x0, then MCLK is most
likely stuck in a high or low state (short or open). If the value received
is < than 0x100, then there is an issue with the MCLK frequency or an
intermittent connection on MCLK.
0xA
ACLK test failed If the value read from the ACLK c ount register is 0x0, then ACLK is most
likely stuck in a high or low state (short or open). If the value received is <
than 0x71, then there is an intermittent connection or frequency issue with
the ACLK or MCLK.
Frame0/Video clock tests
0xBC An issue with the Frame0 signal and/or
the 74.176 MHz clock and the 54 M Hz
clock
This test checks the Frame0 signal, 54 MHz clock and 74.176 MHz clock.
0xB,
0xC
0xB indicates there is an issue with the
54 MHz clock
0xC indicates there is an issue with the
74.176 MHz clock.
Either the clock is not getting to the slot or the frequency is w rong (this could
be an issue with the 74.xx MHz clock mux).
Frame1/Video clock tests
0xDE
An issue with the Frame1 signal and/or
both the 74.25 MHz clock and the 54
MHz clock
This test checks the Frame1 signal, 54 M Hz clock and 74.25 MHz clock.
0xD,
0xE
0xD indicates there is an issue with the
54 MHz clock
0xE indicates there is an issue with the
74.25 MHz clock
Either the clock is not getting to the slot or the frequency is w rong (this could
be an issue with the 74.xx MHz clock mux).
Frame2/Video clock test
0xF An issue with the Frame2 signal
This test checks the Frame2 signal and the 54 MHz clock. If error code 0xF
is generated, then there is most likely an issue with the Frame2 signal. The
54 MHz clock could be at fault, but this would likely have been indicated by
failures in the earlier tests (error codes 0xB or 0xD).
Frame_Out test
0x10
The wrong number of pulses was
detected
In this test, the GPS7’s D O_FPGA toggles the FRAME_OUT signal low to
high 127 (0x7F) times. The Frame FPGA on the mainboard counts number
of high going pulses it receives on FRAME_OUT.
If the number is zero, there is likely an open circuit between the slot
connector and the Frame FPGA on the FRAME_OUT signal.
2–14 TG8000 Multiformat Test Signal Generator Service Manual

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Tektronix TG8000 Specifications

General IconGeneral
BrandTektronix
ModelTG8000
CategoryPortable Generator
LanguageEnglish

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