10 www.xilinx.com Virtex-4 FPGA Configuration User Guide
UG071 (v1.12) June 2, 2017
Preface: About This Guide
- SelectIO Logic Resources
- Advanced SelectIO Logic Resources
• XtremeDSP™ Design Considerations
This guide describes the XtremeDSP slice and includes reference designs for using
DSP48 math functions and various FIR filters.
• Virtex-4
FPGA PCB Designers Guide
This designer’s guide provides information on the design of PCBs for Virtex-4 devices.
It considers all aspects of the PCB from the system level down to the minute details.
This guide focuses on strategies for making design decisions at the PCB and interface
level.
• Virtex-4
FPGA Packaging and Pinout Specification
This specification includes the tables for device/package combinations and maximum
I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and
thermal specifications.
• Virtex-4 RocketIO
™ Multi-Gigabit Transceiver User Guide
This guide describes the RocketIO Multi-Gigabit Transceivers available in the
Virtex-4-FX family.
• Virtex-4
FPGA Embedded Tri-Mode Ethernet MAC User Guide
This guide describes the Tri-Mode Ethernet Media Access Controller available in the
Virtex-4 FX family.
• PowerPC®
405 Processor Block Reference Guide
This guide is updated to include the PowerPC 405 processor block available in the
Virtex-4 FX family.
Additional Resources
To search the database of silicon and software questions and answers, or to create a
technical support case in WebCase, see the Xilinx website at:
http://www.xilinx.com/support
.
Typographical Conventions
This document uses the following typographical conventions. An example illustrates each
convention.
Convention Meaning or Use Example
Italic font
References to other documents
See the Virtex-4 Configuration
Guide for more information.
Emphasis in text
The address (F) is asserted after
clock event 2.