Xilinx Virtex-4 - Preface: about this Guide; Guide Contents; Additional Documentation

Virtex-4 FPGA Configuration User Guide www.xilinx.com 9
UG071 (v1.12) June 2, 2017
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Preface
About This Guide
This document describes the Virtex®-4 Configuration. Complete and up-to-date
documentation of the Virtex-4 family of FPGAs is available on the Xilinx web site at
http://www.xilinx.com/products/virtex4/index.htm
.
Guide Contents
• Chapter 1, “Configuration Overview”
• Chapter 2, “Configuration Interfaces”
• Chapter 3, “Boundary-Scan and JTAG Configuration”
• Chapter 4, “Frame ECC Logic”
• Chapter 5, “User Access Register”
• Chapter 6, “Reconfiguration Techniques”
• Chapter 7, “Configuration Details”
• Chapter 8, “Readback and Configuration Verification”
Additional Documentation
The following documents are also available for download at
http://www.xilinx.com/products/virtex4/index.htm
.
• Virtex-4 Family Overview
The features and product selection of the Virtex-4 family are outlined in this overview.
• Virtex-4
FPGA Data Sheet: DC and Switching Characteristics
This data sheet contains the DC and Switching Characteristic specifications for the
Virtex-4 family.
• Virtex-4
FPGA User Guide
Chapters in this guide cover the following topics:
- Clocking Resources
- Digital Clock Manager (DCM)
- Phase-Matched Clock Dividers (PMCD)
- Block RAM and FIFO memory
- Configurable Logic Blocks (CLBs)
-SelectIO™ Resources