Xilinx Virtex-4 Configuration User Guide

64 www.xilinx.com Virtex-4 FPGA Configuration User Guide
UG071 (v1.12) June 2, 2017
Chapter 3: Boundary-Scan and JTAG Configuration
R
BYPASS Register
The other standard data register is the single flip-flop BYPASS register. It passes data
serially from the TDI pin to the TDO pin during a bypass instruction. This register is
initialized to zero when the TAP controller is in the CAPTURE-DR state.
Identification Register
Virtex devices have a 32-bit identification register called the IDCODE register. The
IDCODE is based on the IEEE 1149.1 standard, and is a fixed, vendor-assigned value that is
used to identify electrically the manufacturer and the type of device that is being
addressed. This register allows easy identification of the part being tested or programmed
by Boundary-Scan, and it can be shifted out for examination by using the IDCODE
instruction.
The Virtex-4 JTAG ID Code register has the following format:
vvvv:fffffff:aaaaaaaaa:ccccccccccc1
where
v = the revision code
f = the 7-bit family code (0001011 for Virtex-4 LX family, 0010000 for Virtex-4 SX
family, 0001111 for Virtex-4 FX family)
a = the number of array rows plus columns in the part, expressed in 9 bits:
c = the company code.
The last bit of the IDCODE is always 1 (based on JTAG IEEE 1149.1). The last three hex
digits appear as 0x093. IDCODEs assigned to Virtex-4 FPGAs are shown in Table 3-4.
Note the similarity to the device ID codes in Table 1-6.
XC4VLX15 columns + rows = 64 + 24 = 88 = 0x058
XC4VLX25 columns + rows = 96 + 28 = 124 = 0x07C
XC4VLX40 columns + rows = 128 + 36 = 164 = 0x0A4
XC4VLX60 columns + rows = 128 + 52 = 180 = 0x0B4
XC4VLX80 columns + rows = 160 + 56 = 216 = 0x0D8
XC4VLX100 columns + rows = 192 + 64 = 256 = 0x100
XC4VLX160 columns + rows = 192 + 88 = 280 = 0x118
XC4VLX200 columns + rows = 192 + 116 = 308 = 0x134
XC4VSX25 columns + rows = 64 + 40 = 104 = 0x068
XC4VSX35 columns + rows = 96 + 40 = 136 = 0x088
XC4VSX55 columns + rows = 128 + 48 = 176 = 0x0B0
XC4VFX12 columns + rows = 64 + 24 = 88 = 0x058
XC4VFX20 columns + rows = 64 + 36 = 100 = 0x064
XC4VFX40 columns + rows = 96 + 52 = 148 = 0x094
(1)
XC4VFX60 columns + rows = 128 + 52 = 180 = 0x0B4
XC4VFX100 columns + rows = 160 + 68 = 228 = 0x0E4
XC4VFX140 columns + rows = 192 + 84 = 276 = 0x114
Notes:
1. The actual array size is 148. The JTAG ID code reflects an array size of 96 + 44 = 140
(0x08C).

Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English