Preliminary Technical Data UG-1828
Rev. PrC | Page 265 of 338
Evaluation Board FMC Connector Signals Mapping
The ADRV9001 evaluation board use FMC standard connector as an interface to carrier boards. Table 106 outlines signal mapping used
on FMC connector implemented on ADRV9001 evaluation board. Second column refers to FMC standard pinout names. For more
information refer to ADRV9001 EVB schematic.
Table 106. FMC Pinout Mapping Used by ADRV9001 Evaluation Board
Schematic Net Name FMC Connector Mappings
FPGA_REF_CLK+ G02-FMC_CLK1_M2C_P
FPGA_REF_CLK- G03-FMC_CLK1_M2C_N
DEV_CLK_OUT H04-FMC_CLK0_M2C_P
SM_FAN_TACH H05-FMC_CLK0_M2C_N
RX1_DCLK_OUT+ G06-FMC_LA00_CC_P
RX1_DCLK_OUT- G07-FMC_LA00_CC_N
RX1_STROBE_OUT+ H07-FMC_LA02_P
RX1_STROBE_OUT- H08-FMC_LA02_N
RX1_IDATA_OUT+ G09-FMC_LA03_P
RX1_IDATA_OUT- G10-FMC_LA03_N
RX1_QDATA_OUT+ H10-FMC_LA04_P
RX1_QDATA_OUT- H11-FMC_LA04_N
DGPIO_13_TX1_DCLK_OUT+ D08-FMC_LA01_CC_P
DGPIO_12_TX1_DCLK_OUT- D09-FMC_LA01_CC_N
TX1_DCLK_IN+ H13-FMC_LA07_P
TX1_DCLK_IN- H14-FMC_LA07_N
TX1_STROBE_IN- C11-FMC_LA06_N
TX1_IDATA_IN+ G12-FMC_LA08_P
TX1_IDATA_IN- G13-FMC_LA08_N
TX1_QDATA_IN+ D11-FMC_LA05_P
RX2_DCLK_OUT+ D20-FMC_LA17_CC_P
RX2_DCLK_OUT- D21-FMC_LA17_CC_N
RX2_STROBE_OUT+ H25-FMC_LA21_P
RX2_STROBE_OUT- H26-FMC_LA21_N
RX2_IDATA_OUT+ G21-FMC_LA20_P
RX2_IDATA_OUT- G22-FMC_LA20_N
RX2_QDATA_OUT+ H22-FMC_LA19_P
RX2_QDATA_OUT- H23-FMC_LA19_N
DGPIO_15_TX2_DCLK_OUT+ C22-FMC_LA18_CC_P
DGPIO_14_TX2_DCLK_OUT- C23-FMC_LA18_CC_N
TX2_DCLK_IN+ G24-FMC_LA22_P
TX2_STROBE_IN+ H28-FMC_LA24_P
TX2_STROBE_IN- H29-FMC_LA24_N
TX2_IDATA_IN+ D23-FMC_LA23_P
TX2_IDATA_IN- D24-FMC_LA23_N
TX2_QDATA_IN- G28-FMC_LA25_N
RX1_ENABLE C14-FMC_LA10_P
RX2_ENABLE D27-FMC_LA26_N
TX1_ENABLE D14-FMC_LA09_P
TX2_ENABLE G30-FMC_LA29_P
SPI_EN H19-FMC_LA15_P
SPI_CLK G15-FMC_LA12_P
SPI_DIO G31-FMC_LA29_N
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