Preliminary Technical Data UG-1828
Rev. PrC | Page 71 of 338
SYSTEM CONTROL
The datapaths within the ADRV9001 can be controlled either through the API or through ENABLE pin controls. In the case of API
control, this is reliant on the SPI communication bus and thus for critical time alignment of powering on/off chains, pin control is
recommended. Each datapath is independently controlled, with the following enable signals defined:
Table 23. Data Path Enable Signals.
RX1_ENABLE Rx1 datapath
RX2_ENABLE Rx2 datapath
TX1_ENABLE Tx1 datapath
TX2_ENABLE Tx2 datapath
For ADRV9001 to receive and react to control signals it must be moved to the primed state. The primed state indicates that the system is
ready for operation when the transmit and receive channels are enabled by the user. After the channel is primed, in order to start transmit
or reception activities, it must be further transitioned from the primed state to the RF_ENABLED state. This can be accomplished by a set
of API calls.
PIN Mode
1. Call adi_adrv9001_Radio_ChannelEnableMode_Set( ) to set the PIN mode.
2. Toggle corresponding ENABLE pin to transition the channel to the RF_ENABLED state.
SPI Mode
1. Call adi_adrv9001_Radio_ChannelEnableMode_Set( ) to set the SPI mode.
2. Call adi_adrv9001_Radio_Channel_EnableRf( ) to transition the channel to RF_ENABLED state.
After pin or SPI/API mode is executed, the ADRV9001 enables the requested channels. The channels remain active until further
instruction through a pin command or SPI/API command.
TIMING PARAMETERS CONTROL
ADRV9001 has integrated stream processors to handle various external and internal events that are required to be serviced in real time.
Those stream processors coupled with programmable delayed enable modules relieve the system firmware (running on integrated
microprocessor) from managing all those critical events by providing a quick and parallel response to external and internal events. This
configuration allows the 4 channels (Tx1, Tx2, Rx1, and Rx2) to operate independently from each other by using their own dedicated
stream processor.
ADRV9001 can support different applications, each with its own unique challenges. A set of programmable timing parameters for both
transmitter and receiver are provided to users to meet their particular timing requirements in various TDD applications. Understanding
the ADRV9001 timing parameters is crucial to ensure all TDD events taking place at an accurate time order, as expected by the user. In
addition, configuring timing parameters in an optimal way by taking advantage of the multiple power saving modes ADRV9001 offered
could improve the overall system power consumption performance significantly.
Timing Definition
Before explaining the typical values for each delay, this chapter will attempt to visualize and explain each delay and how it pertains to the
physical component. Inspect Figure 62 for a visual representation of the most pertinent delays in a system. Note that the length of each
arrow does not represent the length of each delay in time, these are just representations of what each delay is in terms of the hardware.
Timing information will be provided later in this chapter.
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