Analog Devices ADRV9002

UG-1828 Preliminary Technical Data
Rev. PrB | Page 6 of 277
BLOCK DIAGRAM
HP
ADC
DAC
DAC
SPI PORT
MICROPROCESSOR
CLOCK
GENERATION
2
2
2
2
2
2
2
2
2
2
2
2
2
AUXILIARY
CLOCK
GENERATION
6
CONTROLS
TX1_QDATA_IN±
TX1_IDATA_IN±
TX1_STROBE_IN±
TX1_DCLK_IN±
TX1_DCLK_OUT±
RX1_QDATA_OUT±
RX1_IDATA_OUT±
RX1_STROBE_OUT±
RX1_DCLK_OUT±
12
DGPIOs
4
SPI
/n
LPF
LPF
90°
0°
MULTI CHIP
SYNCHRONIZATION
2
MCS
4
AuxADCs
12
AGPIOs
4
2
4
Rx1
RX1A+
RX1A–
RX1B+
RX1B–
TX1+
TX1–
Tx1
EXT_LO1+
EXT_LO1–
DEV_CLK+
DEV_CLK–
EXT_LO2+
EXT_LO2–
TX2+
TX2–
RX2A+
RX2A–
RX2B+
RX2B–
Rx2
Tx2
RX2_QDATA_OUT±
RX2_IDATA_OUT±
RX2_STROBE_OUT±
RX2_DCLK_OUT±
TX2_QDATA_IN±
TX2_IDATA_IN±
TX2_STROBE_IN±
TX2_DCLK_IN±
TX2_DCLK_OUT±
1.0V ANALOG
(OPTIONAL)
1.0V DIGITAL
1.3V ANALOG
1.8V DIGITAL
1.8V ANALOG
2
2
2
2
2
0/9
15/10
LP
ADC
LP
ADC
HP
ADC
DIGITAL SIGNAL PROCESSING:
- NARROW/WIDE BAND DECIMATION
- DC OFFSET CORRECTION (DC)
- QUADRATURE ERROR CORRECTION (QEC)
- NUMERICALLY CONTROLLED OSCILLATOR (NCO)
- PROGRAMMABLE FIR FILTER (PFIR)
- AUTOMATIC GAIN CONTROL (AGC)
- RECEIVER SIGNAL STRENGTH INDICATOR (RSSI)
- OVERLOAD DETECTORS
DATA
PORT
CMOS-SSI
OR
LVDS-SSI
DATA
PORT
CMOS-SSI
OR
LVDS-SSI
LO1
GENERATOR
RF VCO1
SYNTHESIZER
DEV_CLK
/XTAL
OSCILLATOR
RF VCO2
SYNTHESIZER
LO2
GENERATOR
/n
ADVANCED FEATURES
- FREQUENCY HOPPING
- DYNAMIC PROFILE SWITCHING
- MONITOR MODE
CONTROL
INTERFACE
DIGITAL GPIOs
POWER
MANAGEMENT
LPF
LPF
90°
0°
DIGITAL SIGNAL PROCESSING:
- NARROW/WIDE BAND INTERPOLATION
- LOCAL OSCILLATOR LEAKAGE SUPPRESSION (LOL)
- QUADRATURE ERROR CORRECTION (QEC)
- PROGRAMMABLE FIR FILTER (PFIR)
- POWER AMPLIFIER PROTECTION
- TX ATTENUATION CONTROL
- DIRECT PLL MODULATION
- DIGITAL PRE-DISTORTION (DPD)
90°
0°
DAC
DAC
LPF
LPF
DIGITAL SIGNAL PROCESSING:
- NARROW/WIDE BAND INTERPOLATION
- LOCAL OSCILLATOR LEAKAGE SUPPRESSION (LOL)
- QUADRATURE ERROR CORRECTION (QEC)
- PROGRAMMABLE FIR FILTER (PFIR)
- POWER AMPLIFIER PROTECTION
- Tx ATTENUATION CONTROL
- DIRECT PLL MODULATION
- DIGITAL PRE-DISTORTION (DPD)
DATA
PORT
CMOS-SSI
OR
LVDS-SSI
AuxADC,
AuxDACs,
ANALOG GPIOs
90°
0°
LPF
LPF
HP
ADC
HP
ADC
LP
ADC
LP
ADC
DIGITAL SIGNAL PROCESSING:
- NARROW/WIDE BAND DECIMATION
- DC OFFSET CORRECTION (DC)
- QUADRATURE ERROR CORRECTION (QEC)
- NUMERICALLY CONTROLLED OSCILLATOR (NCO)
- PROGRAMMABLE FIR FILTER (PFIR)
- AUTOMATIC GAIN CONTROL (AGC)
- RECEIVER SIGNAL STRENGTH INDICATOR (RSSI)
- OVERLOAD DETECTORS
DATA
PORT
CMOS-SSI
OR
LVDS-SSI
24159-002
Figure 2. ADRV9002 Block Diagram