Preliminary Technical Data UG-1828
Rev. PrC | Page 281 of 338
Pin No. Type Mnemonic Unused instructions
G7 Input VCONV_1P8 Not applicable.
G8 Input VAGPIO_1P8 Not applicable.
G10 Input VAUXVCO_1P3 Not applicable.
G14, H14 Output TX1+, TX1- Do not connect.
H2 Input VANA2_1P8 Not applicable.
H3 Output VTX2LO_1P0 Connect to VSSA when unused
H4 Input AUXADC_3 Do not connect.
H5 Output VCLKVCO_1P0 Not applicable.
H7 Output VCONV_1P0 Not applicable.
H8 Input VCONV_1P3 Not applicable.
H10 Output VAUXVCO_1P0 Not applicable.
H11 Input AUXADC_0 Do not connect.
H12 Output VTX1LO_1P0 Not applicable.
H13 Input VANA1_1P8 Not applicable.
K2 Input/Output SPI_DIO Not applicable.
K3 Input RX2_EN Do not connect.
K5 Input VSSA/TESTCK- Not applicable.
K6 to K11, L4 to L6, L9 to L11 Input/Output DGPIO_xx Do not connect.
K12 Input RX1_EN Do not connect.
K13 Input RESETB Not applicable.
K14 Output GP_INT Do not connect.
L1 Input SPI_EN Not applicable.
L2 Output SPI_DO In SPI 3-wire mode, do not connect.
L3 Input TX2_EN Do not connect.
L7, L8 Input VDIG_1P0 Not applicable.
L12 Input TX1_EN Do not connect.
L13 Input MODE Connect to VSSA.
L14 Output DEV_CLK_OUT Do not connect.
M1 Output RX2_IDATA_OUT- Do not connect
M2 Output RX2_IDATA_OUT+ Do not connect
M3 Output RX2_DCLK_OUT- Do not connect
M4 Output RX2_DCLK_OUT+ Do not connect
M5 Input/Output DGPIO_15/TX2_DCLK_OUT+ Do not connect.
M6 Input/Output DGPIO_14/TX2_DCLK_OUT- Do not connect.
M7 Input VDIGIO_1P8 Not applicable.
M8 Output VDIG_0P9 Not applicable.
M9 Input/Output DGPIO_12/TX1_DCLK_OUT- Do not connect.
M10 Input/Output DGPIO_13/TX1_DCLK_OUT+ Do not connect.
M11 Output RX1_DCLK_OUT+ Do not connect
M12 Output RX1_DCLK_OUT- Do not connect
M13 Output RX1_IDATA_OUT+ Do not connect
M14 Output RX1_IDATA_OUT- Do not connect
N1 Output RX2_STROBE_OUT- Do not connect
N2 Output RX2_STROBE_OUT+ Do not connect
N3 Output RX2_QDATA_OUT- Do not connect
N4 Output RX2_QDATA_OUT+ Do not connect
N5 Input TX2_DCLK_IN+ Do not connect.
N6 Input TX2_DCLK_IN- Do not connect