Anritsu MT8801C - Reading, Writing to and Clearing the Extended Event Status Enable Register; Reading, Writing to and Clearing the Extended Event Status Register

5-17
5.5.3 Reading, writing to and clearing the extended event status register
Reading
Writing With the exception of clearing, writing operations cannot be performed externally.
Clearing
The register is cleared in the following cases:
[1] A *CLS command is received.
[2] The power is turned on.
[3] An event is read by the ESR2?/ESR3? query command.
The register is destructively read by a query (e.g., it cleared after being read).
The END/ERR event status register is read by ESR2?/ESR3? query. The read value,
an integer format data (NR1), is obtained by binary weighting the event bit and
converting it to decimal.
5.5.4 Reading, writing to and clearing the extended event status en-
able register
Reading
Writing
Clearing
The register is non-destructively read by a query (i.e., not cleared after being read).
The END/ERR event status register is read by the ESE2?/ESE3? query.
The read value, an integer format data (NR2), is obtained by binary total weighting the
event bit and converting it to decimal.
The END/ERR event status register is written to by the ESE2/ESE3 program command.
As bits 0 to 7 of the registers are respectively binary weighted to 1, 2, 4, 8, 16, 32, 64,
and 128, write data is sent as the integer format data obtained by total weighting the digit
value of bits selected from among them.
The register is cleared in the following cases:
[1] The ESE2/ESE3 program command with a data value of 0 is received for the
END/ERR event status register.
[2] The power is turned on the power-on-status-clear flag is true.
The extended event status enable register is not affected by the following:
[3] Changes of the status of the IEEE488.1 device clear function
[4] An *RST common command is received.
[5] A *CLS common command is received.
5.5 Extended Event Status Register