Anritsu MT8801C - Wait for Service Request Issuance from the Status Register

Section 5 Status Messages
5-22
5.6.5 Wait for service request issuance from the status register
An event status register bit of the MT8801C is set to 1 when the corresponding event
occurs. After setting these bits to set the RQS, the controller waits the SRQ for syn-
chronization. Reset the event status register immediately before making a desired
event occur.
• <Controller program 1: Synchronization by operation termination bit>
[4] Makes the device execute the specified operation.
[5] Waits for SRQ interrupt (ESB summary message).
....Status byte value:
2
6
+ 2
5
= 96
PRINT @1:"*CLS"
[1] Clears the status register.
to the next operation
PRINT @1:"*ESE 1"
PRINT @1:"*SRE 32"
[2] Sets bit 2
0
of the standard event status enable register to 1.
[3] Sets bit 2
5
(32) of the service request enable register to 1.