GR740-UM-DS, Nov 2017, Version 1.7 185 www.cobham.com/gaisler
GR740
14 Enable external time (ET) - When a time-code is received on the port and this bit is set to 0, the router discards
the received time-code value and instead increments its internal time-counter value (RTR.TC.TC), and forwards
a time-code with the new value to the other ports. If this bit is set to 1 when the time-code is received, the time-
code is processed according to the rules described in section 13.2.17. This bit is only available for the AMBA
ports.
13: 11 RESERVED
10 Disable port (DI) - When set to 1, data transfers to and from this port are disabled. See section 13.2.8 for details.
9 Packet timer enable (TR) - Enable the data character timer for incoming packets. See section 13.2.15 for details.
8 Priority (PR) - This bit is double mapping of the RTR.RTACTRL.SR bit. See table 176.
7 Transmit FIFO reset (TF) - Resets the transmit FIFO on this port. This means that the FIFO is emptied (counters
and pointers set to 0), and an EEP is written to the FIFO to ensure that any incomplete packet is detected by the
receiver. If a packet transmission is active (another port is using this port as output port) when this bit is set, the
remainder of that packet will be spilled before the EEP is inserted. This bit is self-clearing, and should not be
written with 0 while it is 1, since that could abort the ongoing transmit FIFO reset.
6 Receive FIFO spill (RS) - Spills the receive FIFO for this port, meaning that the packet currently being received
is spilled. The output port(s) used for the packet will have an EEP written to the transmit FIFO to indicate that
the packet was ended prematurely. If no packet is received, setting this bit has no effect. This bit is self-clearing,
and should not be written with 0 while it is 1, since that could abort the ongoing receive FIFO spill.
5 Time-code enable (TE) - Enables time-codes to be received and transmitted on this port. When set to 1, received
time-codes are processed according to the rules described in section 13.2.17. If this bit is set to 0, all received
time-codes on this port are ignored.
4 RESERVED
3 Configuration port access enable (CE) - Enable accesses to the configuration port from this port. If set to 0,
incoming packets with physical address 0 will be spilled.
2 Autostart (AS) - Enable the link interface FSM’s autostart feature, as defined in [SPW]. This bit is only available
for the SpaceWire ports.
1 Link start (LS) - Start the link interface FSM. This bit is only available for the SpaceWire ports.
0 Link disabled (LD) - Disable the link interface FSM. This bit is only available for the SpaceWire ports.
Table 178. 0x00000804-0x00000830 - RTR.PCTRL - Port control, ports 1-12 (SpaceWire ports and AMBA ports)
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