GR740-UM-DS, Nov 2017, Version 1.7 271 www.cobham.com/gaisler
GR740
18 RxSYNCSynchronization message received (optional)
The interrupt lines are shared with the general purpose I/O ports, see interrupt assignments in section
2.4.
17.9 Registers
The core is programmed through registers mapped into APB address space.
Table 339.GRCAN registers
APB address offset Register
0x000 Configuration Register
0x004 Status Register
0x008 Control Register
0x018 SYNC Mask Filter Register
0x01C SYNC Code Filter Register
0x100 Pending Interrupt Masked Status Register
0x104 Pending Interrupt Masked Register
0x108 Pending Interrupt Status Register
0x10C Pending Interrupt Register
0x110 Interrupt Mask Register
0x114 Pending Interrupt Clear Register
0x200 Transmit Channel Control Register
0x204 Transmit Channel Address Register
0x208 Transmit Channel Size Register
0x20C Transmit Channel Write Register
0x210 Transmit Channel Read Register
0x214 Transmit Channel Interrupt Register
0x300 Receive Channel Control Register
0x304 Receive Channel Address Register
0x308 Receive Channel Size Register
0x30C Receive Channel Write Register
0x310 Receive Channel Read Register
0x314 Receive Channel Interrupt Register
0x318 Receive Channel Mask Register
0x31C Receive Channel Code Register