GR740-UM-DS, Nov 2017, Version 1.7 406 www.cobham.com/gaisler
GR740
The core will signal AHB access completion by setting bit 32 of the data register. A debug host can
look at bit 32 of the received data to determine if the access was successful. If bit 32 is ‘1’ the access
completed and the data is valid. If bit 32 is ‘0’, the AHB access was not finished when the host started
to read data. In this case the host can repeat the read of the data register until bit 32 is set to ‘1’, signal-
ing that the data is valid and that the AMBA AHB access has completed.
It should be noted that while bit 32 returns ‘0’, new data will not be shifted into the data register. The
debug host should therefore inspect bit 32 when shifting in data for a sequential AHB access to see if
the previous command has completed. If bit 32 is ‘0’, the read data is not valid and the command just
shifted in has been dropped by the core.
34.3 Registers
The core does not implement any registers mapped in the AMBA AHB or APB address space.
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