GR740-UM-DS, Nov 2017, Version 1.7 50 www.cobham.com/gaisler
GR740
6.2 LEON4 integer unit
6.2.1 Overview
The LEON4 integer unit implements the integer part of the SPARC V8 instruction set. The implemen-
tation is focused on high performance and low complexity. The LEON4 integer unit has the following
main features:
• 7-stage instruction pipeline
• Separate instruction and data cache interface
• Support for eight register windows
• Hardware multiplier and Radix-2 divider (non-restoring)
• Static branch prediction
• Single-vector trapping for reduced code size
Figure 3. LEON4 integer unit datapath diagram
alu/shift
mul/div
y
64-bit 4-port register file
D-cache
dcache read data
64
op2rs1
Y
wres
result m_y
Decode
Execute
Memory
Write-back
rs2
rs1
rd
tbr, wim, psr
32
dcache address
e pc
30
+1
d_pc
jmpa
f_pc
Add
call/branch address
tbr
‘0’
e_pc
m_pc
w_pc
d_inst
e_inst
m_inst
w_inst
Fetch
I-cache
address
data
Register Access
x_y
xres
Exception
x_pcx_inst
r_pcr_inst
y, tbr, wim, psr
r_imm
rs3
stdata
64
dcache write data