GR740-UM-DS, Nov 2017, Version 1.7 213 www.cobham.com/gaisler
GR740
14.8 Registers
The core is programmed through registers mapped into APB address space.
Table 235.GRETH_GBIT registers
APB address offset Register
0x0 Control register
0x4 Status/Interrupt-source register
0x8 MAC Address MSB
0xC MAC Address LSB
0x10 MDIO Control/Status
0x14 Transmit descriptor pointer
0x18 Receiver descriptor pointer
0x1C EDCL IP
0x20 Hash table msb
0x24 Hash table lsb
0x28 EDCL MAC address MSB
0x2C EDCL MAC address LSB
0x30 - 0xFF RESERVED
To Next Page
Loading...
Need help?
General
