COBHAM GR740 User Manual

GR740-UM-DS, Nov 2017, Version 1.7 137 www.cobham.com/gaisler
GR740
12.9.6 Status register
Table 135.0x18 - STATUS - Status register
12.9.7 Interrupt mask register
Table 136.0x1c - IMASK - Interrupt mask register
31 6543210
RESERVED PE DE FC FL AD TE
0 000000
r wcwcwcwcwcwc
31:6 RESERVED
5 Parity Error (PE) - The core sets this bit to ‘1’ when it detects a parity error in the tag or data RAM
of the APV cache. This field is cleared by writing ‘1’ to this position, writes of ‘0’ have no effect.
4 Diagnostic Mode Enabled (DE) - If this bit is set to ‘1’ the core is in Diagnostic Mode where the
core’s internal buffers can be accessed via the Diagnostic access registers. While in this mode the
core will not forward any incoming AMBA accesses.
3 Flush Completed (FC) - The core sets this bit to ‘1’ when a flush operation completes. This field is
cleared by writing ‘1’ to this position, writes of ‘0’ have no effect.
2 Flush started (FL) - The core sets this bit to ‘1’ when a Flush operation has started. This field is
cleared by writing ‘1’ to this position, writes of ‘0’ have no effect.
1 Access Denied (AD) - The core denied an AMBA access. This field is cleared by writing ‘1’ to this
position, writes of ‘0’ have no effect.
0 Translation Error (TE) - The core received an AMBA ERROR response while accessing the bit vec-
tor or page tables in memory. This also leads to the incoming AMBA access being inhibited.
Depending on the status of the Control register’s AU field and this register’s AD field this may also
lead to an update of the AHB Failing Access register.
31 6543210
RESERVED PEI R FCI FLI ADI TEI
0 000000
r rwrwrwrwrwrw
31:6 RESERVED
5 Parity Error Interrupt (PEI) - If this bit is set to ‘1’ an interrupt will be generated when the PE bit in
the Status register transitions from ‘0’ to ‘1’.
4RESERVED
3 Flush Completed Interrupt (FCI) - If this bit is set to ‘1’ an interrupt will be generated when the FC
bit in the Status register transitions from ‘0’ to ‘1’.
2 Flush Started Interrupt (FLI) - If this bit is set to ‘1’ an interrupt will be generated when the FL bit in
the Status register transitions from ‘0’ to ‘1’..
1 Access Denied Interrupt (ADI) - If this bit is set to ‘1’ an interrupt will be generated when the AD bit
in the Status register transitions from ‘0’ to ‘1’.
0 Translation Error Interrupt (TEI) - If this bit is set to ‘1’ an interrupt will be generated when the TE
bit in the Status register transitions from ‘0’ to ‘1’.

COBHAM GR740 Specifications

General

Brand	COBHAM
Model	GR740
Category	Computer Hardware
Language	English