GR740-UM-DS, Nov 2017, Version 1.7 342 www.cobham.com/gaisler
GR740
26 LEON4 Statistics Unit (Performance Counters)
26.1 Overview
The LEON4 Statistics Unit (L4STAT) is used count events in the LEON4 processor and the AHB bus,
in order to create performance statistics for various software applications.
L4STAT consists of sixteen 32-bit counters that increment on a selected event. The counters roll over
to zero when reaching their maximum value, but can also be automatically cleared on reading to facil-
itate statistics building over longer periods. Each counter has a control register where the event type is
selected. The control registers also indicates which particular processor core is monitored. The table
435 below shows the event types that can be monitored.
Table 435.Event types and IDs
ID Event description
Processor events:
0x00 Instruction cache miss
0x01 Instruction MMU TLB miss
0x02 Instruction cache hold
0x03 Instruction MMU hold
0x08 Data cache (read) miss
0x09 Data MMU TLB miss
0x0A Data cache hold
0x0B Data MMU hold
0x10 Data write buffer hold
0x11 Total instruction count
0x12 Integer instructions
0x13 Floating-point unit instruction count
0x14 Branch prediction miss
0x15 Execution time, excluding debug mode
0x17 AHB utilization (per AHB master)
0x18 AHB utilization (total, master/CPU selection is ignored)
0x22 Integer branches
0x28 CALL instructions
0x30 Regular type 2 instructions
0x38 LOAD and STORE instructions
0x39 LOAD instructions
0x3A STORE instructions
AHB events (counted via LEON4 Debug Support Unit):
0x40 AHB IDLE cycles. Filtered on CPU/AHBM if SU(1) = ‘1
0x41 AHB BUSY cycles. Filtered on CPU/AHBM if SU(1) = ‘1
0x42 AHB NON-SEQUENTIAL transfers. Filtered on CPU/AHBM if SU(1) = ‘1
0x43 AHB SEQUENTIAL transfers. Filtered on CPU/AHBM if SU(1) = ‘1
0x44 AHB read accesses. Filtered on CPU/AHBM if SU(1) = ‘1
0x45 AHB write accesses. Filtered on CPU/AHBM if SU(1) = ‘1
0x46 AHB byte accesses. Filtered on CPU/AHBM if SU(1) = ‘1
0x47 AHB half-word accesses. Filtered on CPU/AHBM if SU(1) = ‘1
0x48 AHB word accesses. Filtered on CPU/AHBM if SU(1) = ‘1
0x49 AHB double word accesses. Filtered on CPU/AHBM if SU(1) = ‘1
To Next Page
Loading...
Need help?
General
