GR740-UM-DS, Nov 2017, Version 1.7 341 www.cobham.com/gaisler
GR740
25.3.4 CPU/FPU override register
Table 434. 0x0c - OVERRIDE - CPU/FPU override register
31 20 19 16 15 4 3 0
RESERVED FOVERRIDE RESERVED OVERRIDE
0000
rrwrrw
31: 20 RESERVED
19: 16 Override FPU clock gating (FOVERRIDE) - If bit n of this field is set to ’1’ then the clock for FPU
n will be active regardless of the value of %PSR.EF.
15: 4 RESERVED
3: 0 Override CPU clock gating (OVERRIDE) - If bit n of this field is set to ’1’ then the clock for proces-
sor n and FPU n will always be active.
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