GR740-UM-DS, Nov 2017, Version 1.7 83 www.cobham.com/gaisler
GR740
Arithmetic operations include addition, subtraction, multiplication, division and square-root. Each
arithmetic operation can be performed in single or double precision formats. Arithmetic operations
have one clock cycle throughput and a latency of four clock cycles, except for divide and square-root
operations, which have a throughput of 16 - 25 clock cycles and latency of 16 - 25 clock cycles (see
Table 62. : GRFPU operations
Operation OpCode[8:0] Op1 Op2 Result Exceptions Description
Arithmetic operations
FADDSï€
FADDD
001000001
001000010
SPï€
DP
SPï€
DP
SPï€
DP
UNF, NV,
OF, UF, NX
Addition
FSUBSï€
FSUBD
001000101
001000110
SPï€
DP
SPï€
DP
SPï€
DP
UNF, NV,
OF, UF, NX
Subtraction
FMULSï€
FMULDï€
FSMULD
001001001
001001010
001101001
SPï€
DPï€
SP
SPï€
DPï€
SP
SPï€
DPï€
DP
UNF, NV,
OF, UF, NX
UNF, NV,
OF, UF, NXï€
UNF, NV,
OF, UF
Multiplication, FSMULD gives
exact double-precision product of
two single-precision operands.
FDIVSï€
FDIVD
001001101
001001110
SPï€
DP
SPï€
DP
SPï€
DP
UNF, NV,
OF, UF, NX,
DZ
Division
FSQRTSï€
FSQRTD
000101001
000101010
-ï€
-
SPï€
DP
SPï€
DP
UNF, NV,
NX
Square-root
Conversion operations
FITOSï€
FITOD
011000100
011001000
-INTSPï€
DP
NXï€
-
Integer to floating-point conversion
FSTOIï€
FDTOI
011010001
011010010
-SPï€
DP
INT UNF, NV,
NX
Floating-point to integer conversion.
The result is rounded in round-to-
zero mode.
FSTOI_RNDï€
FDTOI_RND
111010001
111010010
-SPï€
DP
INT UNF, NV,
NX
Floating-point to integer conversion.
Rounding according to RND input.
FSTODï€
FDTOS
011001001
011000110
-SPï€
DP
DPï€
SP
UNF, NVï€
UNF, NV,
OF, UF, NX
Conversion between floating-point
formats
Comparison operations
FCMPSï€
FCMPD
001010001
001010010
SPï€
DP
SPï€
DP
CC NV Floating-point compare. Invalid
exception is generated if either oper-
and is a signaling NaN.
FCMPESï€
FCMPED
001010101
001010110
SPï€
DP
SPï€
DP
CC NV Floating point compare. Invalid
exception is generated if either oper-
and is a NaN (quiet or signaling).
Negate, Absolute value and Move
FABSS 000001001 - SP SP - Absolute value.
FNEGS 000000101 - SP SP - Negate.
FMOVS 000000001 SP SP - Move. Copies operand to result out-
put.
SP - single precision floating-point number
DP - double precision floating-point number
CC - condition codes INT - 32 bit integer
UNF, NV, OF, UF, NX - floating-point exceptions, see section 8.2.3