x
D.4 Cbox Read Register..............................................................................D-8
D.5 Exception Address Register (EXC_ADDR)........................................ D-10
D.6 Interrupt Enable and Current Processor Mode Register (IER_CM).. D-12
D.7 Interrupt Summary Register (ISUM) ................................................ D-14
D.8 PAL Base Register (PAL_BASE) ....................................................... D-16
D.9 Ibox Control Register (I_CTL)............................................................ D-18
D.10 Process Context Register (PCTX)....................................................... D-23
D.11 21272-CA Cchip Miscellaneous Register (MISC)............................... D-26
D.12 21272-CA Cchip CPU Device Interrupt Request Register
(DIRn, n=0,1,2,3)................................................................................ D-29
D.13 21272-CA Pchip Error Register (PERROR)....................................... D-31
D.14 21272-CA Array Address Registers (AAR0–AAR3) ........................... D-35
D.15 DPR Registers for 680 Correctable Machine Check Logout Frames . D-37
D.16 DPR Power Supply Status Registers ................................................. D-40
D.17 DPR 680 Fatal Registers.................................................................... D-41
D.18 CPU and System Uncorrectable Machine Check Logout Frame...... D-42
D.19 Console Data Log Event Environmental Error Logout Frame
(680 Uncorrectable)............................................................................ D-43
D.20 CPU and System Correctable Machine Check Logout Frame........... D-44
D.21 Environmental Error Logout Frame (680 Correctable)..................... D-45
D.22 Platform Logout Frame Register Translation ................................... D-46
Appendix E Isolating Failing DIMMs
E.1 Information for Isolating Failures ........................................................E-2
E.2 DIMM Isolation Procedure....................................................................E-3
E.3 EV6 Single-Bit Errors.........................................................................E-16
Index
Examples
3–1 Sample SROM Power-Up Display.........................................................3-8
3–2 SRM Power-Up Display ......................................................................3-10
3–3 Memory Resize Crash/Reboot Cycle....................................................3-15
3–4 Sample Console Event Log.................................................................. 3-19
3–5 AlphaBIOS Initialization Screen........................................................3-20
3–6 AlphaBIOS Boot Screen......................................................................3-21
3–7 Checksum Error and Fail-Safe Load ..................................................3-24
4–1 buildfru .................................................................................................4-4
4–2 more el...................................................................................................4-8