E-16 Compaq AlphaServer ES40 Service Guide
E.3
EV6 Single-Bit Errors
The procedure for detection down to the set of DIMMs for a single-bit
error is very similar to the procedure described in the previous
sections. However, you cannot isolate down to a specific data or check
bit.
The 21264 (EV6) chip detects and reports a C_ADDR<42:6> failing address that
is accurate to the cache block (64 bytes). The syndrome registers (Table E–5)
detect data syndrome information, providing isolation down to the low or high
quadword of the target octaword that the fault has been detected within. Each
of the syndrome registers is able to report 64 data bits (the quadword) and 8
check bits (memory data bus ECC bits).
Table E–5 shows the syndrome hexadecimal to physical data or check bit
decoding. For example, if you have an EV6 single-bit C_Syndrome_0 hexadeci-
mal error value equal to 23, the second column indicates the decoded physical
data or check bit for this encoding. Use these physical data bits in conjunction
with the previously described isolation procedure to isolate the failing DIMMs.
Table E–5 Syndrome to Data Check Bits Table
Syndrome C_Syndrome 0 C_Syndrome 1
CE Data Bit 0 or 128 Data Bit 64 or 192
CB Data Bit 1 or 129 Data Bit 65 or 193
D3 Data Bit 2 or 130 Data Bit 66 or 194
D5 Data Bit 3 or 131 Data Bit 67 or 195
D6 Data Bit 4 or 132 Data Bit 68 or 196
D9 Data Bit 5 or 133 Data Bit 69 or 197
DA Data Bit 6 or 134 Data Bit 70 or 198
DC Data Bit 7 or 135 Data Bit 71 or 199
23 Data Bit 8 or 136 Data Bit 72 or 200
25 Data Bit 9 or 137 Data Bit 73 or 201
26 Data Bit 10 or 138 Data Bit 74 or 202
29 Data Bit 11 or 139 Data Bit 75 or 203
2A Data Bit 12 or 140 Data Bit 76 or 204
2C Data Bit 13 or 141 Data Bit 77 or 205