Registers D-7
Table D–3 Dcache Status Register Fields
Name Bits Type Description
Reserved <63:5> Reserved for Compaq.
SEO <4> W1C
Second error occurred. When set, indicates
that a second D-cache store ECC error
occurred within 6 cycles of the previous
D-cache store ECC error.
ECC_ERR_LD <3> W1C ECC error on load. When set, indicates that
a single-bit ECC error occurred while
processing a load from the D-cache or any
fill.
ECC_ERR_ST <2> W1C ECC error on store. When set, indicates
that an ECC error occurred while
processing a store.
TPERR_P1 <1> W1C
Tag parity error— pipe 1. When set,
indicates that a D-cache tag probe from
pipe 1 resulted in a tag parity error. The
error is uncorrectable and results in a
machine check.
TPERR_P0 <0> W1C
Tag parity error— pipe 0. When set, this bit
indicates that a D-cache tag probe from
pipe 1 resulted in a tag parity error. The
error is uncorrectable and results in a
machine check.
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