Error Logs 5-17
Table 5–3 Sample Error Log Event Structure Map
(ES40 with 10 PCI Slots)
OFFSET(hex) 63 56 55 48 47 40 39 32 31 24 23 16 15 8 7 0
nh0000
nh+nnnn
STANDARD MICROSOFT NT OS HEADER
ech0000
ech+nnnn
NEW COMMON OS HEADER
lfh0000
lfh+nnnn
STANDARD LOGOUT FRAME HEADER
lfev60000
lfev6+nnnn
COMMON PAL EV6 SECTION
(first 8 QWs Zeroed)
lfctt_A0[u] SESF<63:32> =
Reserved(MBZ)
<39:32>=
(MBZ)
SESF<31:16> =
Reserved(MBZ)
SESF<15:0>=
0002(hex)
lfctt_A8[u] Cchip CPUx Device Interrupt Request Register (DIRx<61> = 1)
lfctt_B0[u] Cchip Miscellaneous Register (MISC)
lfctt_B8[u] Pchip0 Error Register (P0_PERROR<63:0> = 0)
lfctt_C0[u] Pchip1 Error Register (P1_PERROR<51>=0;<47:18>=PCI
Addr;<17:16>=PCI Opn; <6>=1)
lfett_C8[u]
lfett_138[u]
Pchip1 Extended Tsunami/Typhoon System Packet
eelcb_140
eelcb_190
eelcb_1E0
eelcb_230
eelcb_280
eelcb_2D0
Pchip 1 PCI Slot 4 Single Device Bus Snapshot Packet
Pchip 1 PCI Slot 5 Single Device Bus Snapshot Packet
Pchip 1 PCI Slot 6 Single Device Bus Snapshot Packet
Pchip 1 PCI Slot 7 Single Device Bus Snapshot Packet
Pchip 1 PCI Slot 8 Single Device Bus Snapshot Packet
Pchip 1 PCI Slot 9 Single Device Bus Snapshot Packet
2D8 Termination or End Packet