Efinix Titanium - Page 80

Titanium Interfaces User Guide
lvds_rule_usage (error)
Message Resource <res name> was assigned multiple times
To fix You cannot assign the same resource to more than one block type. Change the resource to a
different one.
lvds_rule_rx_alt_conn (error)
Message Connection type <type> is not supported by the resource
To fix If you want to use the alternate funciton of an LVDS block, you need to choose a resource that
supports it. You can filter for resources by alternate function in the Resource Assigner.
Message The resource only supports normal connection type
To fix You need to choose the normal connection type or assign a different resource that supports
the connection type you want to use. You can filter for resources by alternate function in the
Resource Assigner.
lvds_rule_alt_conn (warning)
Message Connection type <type> must be used by valid PLL
To fix The LVDS block is connected to a PLL clock input but is the resource you assigned does not
support the pll_clkin alternate function. Choose a different resource that supports it. You can
filter resources by alternate function in the Resource Assigner.
Message Connection type <type> cannot be used on an unbonded resource
To fix You get this error if the resource you choose is not available in the FPGA/package
combination you are using. Choose another resource.
Message pll_clkin connection to PLL clock source not being used in <instance>
To fix The LVDS block is set to be a PLL reference clock (pll_clkin connection type) but the PLL is not
configured to use it. Make sure that the clock you are choosing in the PLL is associated with
this GPIO's resource.
Message pll_clkin connection to PLL clock source but none of the external clock source in PLL
<instance> is selected
To fix The LVDS block is set to be a PLL reference clock (pll_clkin connection type) but the PLL is not
configured to use it. In the PLL block, choose external or dynamic as the Clock Source and
make sure that the clock you are choosing is associated with this GPIO's resource.
Message pll_clkin connection to PLL clock source but PLL Clock source on <instance> is set to core
To fix The LVDS block is set to be a PLL reference clock (pll_clkin connection type) but the PLL is not
configured to use it. In the PLL block, choose external or dynamic as the Clock Source and
make sure that the clock you are choosing is associated with this GPIO's resource.
Message pll_extfb connection to PLL external feedback pin but PLL feedback on <inst> is not set to
default
To fix The LVDS block is set to be external feedback for the PLL (pll_extfb connection type) but the
PLL is not configured to use it. In the PLL Clock Calculator, choose External as the Feedback
Mode.
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