HP 9020 - Memory Organization - 1 Megabyte RAM Board; Memory Organization; Megabyte Memory Organization

Theory of Operation 2-25
Memory Organization - 1 Megabyte RAM Board
The 1 Megabyte RAM board is a polyimide board which uses thirty-nine 256K by 1 bit chips. This
allows
an organization consisting of 256K words (four bytes per word) which can be addressed
without the use of chip select lines, or "blocks" of
RAM (Figure 2-16). The word stored in the RAM
is 32 bits in length with 7 check bits.
The
MC on the RAM board develops eighteen physical address bits from the logical address bits on
the MPB, nine X address bits and nine Y address bits. The multiplexed physical addresses are
routed to each chip by the Memory Address Bus. The X address
is output first, with the the Y
address following. Three control lines go to each RAM chip: Row Address Select (NRAS) - X
address, Column Address Select (NCAS) -
Y address, and Read/Write status (NRW).
MEMORY ADDRESS BUS
AND CONTROL
(9 ADDRESS AND 3 CONTROL-
NRAS,NCAS,NWR) 12
MPB
32
MC
MEMORY DATA BUS
RAM CHIPS ARE 256K X 1 BIT
Figure 2-16. 1 Megabyte Memory Organization