106
4
4 Instructions4.4.1 Four Arithmetic Operations
Example:
Ladder chart
Instruction list
M8
ǒMUL D100 D110 D120Ǔ
LD M8
MUL D100 D110 D120
When M8 is set, the product of D100 (multiplicand) and D110
(multiplier) is stored in D120.
D120 = 5 x 9 = K45 if D100 = K5 and D110 = K9.
D120, d121 = 1234 x 5678 = K7006652 if D100 = K1234 and
D110 = K5678. The product contains more than 16 bits and occupies
the adjacent higher bits D121 and D120 of D.
DIV: Binary number division
◆
Overview
The DIV instruction divides one binary number by another.
DIV S1 S2 D
Binary number
division
Applicable model:
H3U
S1 Dividend Data, or address of the word element that stores the data 16-bit instruction
(7 steps)
DIV: Continuous
execution
DIVP: Pulse
execution
32-bit instruction
(13 steps)
DDIV: Continuous
execution
DDIVP: Pulse
execution
S2 Divider Data, or address of the word element that stores the data
D
Quotient
and
remainder
Address of the word element that stores the data. The
quotient is stored in the address D and the remainder
stored in D+1.
◆
Operands
Operand
Bit Element Word Element
System·User System·User Bit Designation Indexed Address Constant
Real
Number
S1 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
S2 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
D X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
Note: The elements in gray background are supported. The V and Z elements in the preceding table are
available only in 16-bit operation.
◆
Function
The DIV instruction requires contact driving and has three operands. Use this instruction to algebraically
divide the value in S1 by that in S2 in BIN mode. The result is stored in D. The variables in the algebraic
operation are processed as signed numbers. The highest bit is the sign bit. The value 0 indicates a positive
number, whereas the value 1 indicates a negative number.
In 32-bit operation, the S1 and S2 variable addresses in the DIV instruction contain the lower 16 bits,
and the adjacent high-numbered address unit contains the higher 16 bits. Avoid repeated or overlapping
addresses during programming. The quotient is stored in the D and D+1 units, and the remainder is stored
in the D+2 and D+3 address units.
A calculation error will occur if the divider S2 is 0.
No remainder is produced if a bit element (KnX, KnY, KnM, or KnS) is designated as D.
If the dividend is a negative number, the remainder is also a negative number.
To Next Page
Loading...
