Inovance H3U Series - Full Data Reset

180
4
4 Instructions4.5.3 Table Operation
ZRST: Full data reset
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Overview
The ZRST instruction resets data in batches.
ZRST D1 D2
Full data reset Applicable model:
H3U
D1
Batch
reset head
address
Head address of elements whose data will be reset in
batches
16-bit instruction
(5 steps)
ZRST:
Continuous
execution
ZRSTP: Pulse
execution
D2
Batch
reset end
address
End address of elements whose data will be reset in
batches
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Operands
Operand
Bit Element Word Element
System·User System·User Bit Designation Indexed Address Constant
Real
Number
D1 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
D2 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
Note: The elements in gray background are supported.
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Function
The values of all variables between D1 and D2 are cleared. D1 and D2 can be specied as word variables
or Y, M, and S bit variables.
Requirements
D1 and D2 must be of the same element type.
D1 cannot be greater than D2. If they are the same, only the data in the designated element is reset.
The ZRST instruction is a 16-bit instruction, but 32-bit counters can be designated for D1 and D2. Ensure
that they use counters of the same bit type.
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Application