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Inovance H3U Series - Page 305

Inovance H3U Series
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304
4
4 Instructions4.11.2 Verication
The program is running
M8161 = OFF and the 16-bit conversion mode is enabled. The lower eight bits of elements D100 to D105
are taken for CRC code calculation. The result is stored in the higher eight bits and lower eight bits of D200.
LRC: LRC code calculation
Overview
The LRC instruction calculates the longitudinal redundancy check (LRC) code in ASCII mode.
LRC
S n D
LRC code
calculation
Applicable model:
H3U
S Source data
Head address of elements that store the data for
LRC code calculation
16-bit instruction (7
steps)
LRC: Continuous
execution
LRCP: Pulse
execution
n Data count
Number of operated data entries, which must be an
even number; value range: K1 to K256
D Result Register that stores the operation result

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