Mitsubishi Electric MELSEC iQ-F FX5 - Data backup;restoration function; Mask pattern of interrupt pointers

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APPX
Appendix 2 Special Register List
Data backup/restoration function
The special registers for data backup/restoration function are shown below.
Mask pattern of interrupt pointers
The special registers for the mask pattern of interrupt pointers are shown below.
SD9302 Data logging setting No.3 Data logging register/
clear error code
The cause of the error that occurred when
SM9302 (Data logging register/clear flag) is ON
(register)/OFF (clear) is stored.
0: No error
Other than 0: Error code
R/W
SD9303 Data logging setting No.4 Data logging register/
clear error code
The cause of the error that occurred when
SM9303 (Data logging register/clear flag) is ON
(register)/OFF (clear) is stored.
0: No error
Other than 0: Error code
R/W
No. Name Description Compatible CPU module R/W
FX5S FX5UJ FX5U/
FX5UC
SD1350 Number of uncompleted folders/files of CPU
module data backup/restoration
This register indicates the number of folders/files
where the backup/restoration of the CPU
module is not completed. When the backup/
restoration processing is started, the total
number of folders and files to be backed up or
restored is stored. The number is reduced one
each time one folder/file is backed up or
restored, and 0 is stored when all the data is
backed up or restored.
R
SD1351 Progression status of CPU module data backup/
restoration
This register indicates the progression status of
the backup or restoration as a percentage.
(Range of the value: 0 to 100 (%))
"0" is set at the start of CPU module data
backup/restore.
R
No. Name Description Compatible CPU module R/W
FX5S FX5UJ FX5U/
FX5UC
SD1400 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I15 to I0
R
SD1401 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I31 to I16
R
SD1402 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I47 to I32
R
SD1403 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I63 to I48
R
SD1404 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I79 to I64
R
SD1405 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I95 to I80
R
SD1406 IMASK instruction mask pattern This register stores the IMASK instruction mask
pattern.
b15 to b0: I111 to I96
R
No. Name Description Compatible CPU module R/W
FX5S FX5UJ FX5U/
FX5UC