750
APPX
Appendix 2 Special Register List
*1 Enabled only when the STL instruction is used.
*2 Only FX5U/FX5UC CPU module is supported.
SD8422 RS2 amount of remaining data (CH2)/MODBUS
communication error code (CH2)
This register stores the amount of remaining
data (CH2)/MODBUS communication error code
(CH2).
R
SD8423 RS2 receive data points (CH2)/MODBUS
communication error details (CH2)
This register stores the receive data points
(CH2)/MODBUS communication error details
(CH2).
R
SD8425 RS2 communication parameter display (CH2)/
MODBUS communication format display (CH2)
This register stores the communication
parameter display (CH2)/MODBUS
communication format display (CH2).
R
SD8428 MODBUS communication retry times (CH2) This register stores the MODBUS
communication current retry times (CH2).
R
SD8434 RS2 receive sum (received data) (CH2) This register stores the CH2 receive sum
(received data).
R
SD8435 RS2 receive sum (calculated result) (CH2) This register stores the CH2 receive sum
(calculated result).
R
SD8436 RS2 send sum (CH2) This register stores the send sum (CH2). R
SD8438 Serial communication error code (CH2) This register stores the serial communication
error code (CH2).
R
SD8439 Operation mode (CH2) This register stores the operation mode (CH2). R
SD8492 IP address setting [Low-order] This register stores the IP address. R/W
SD8493 IP address setting [High-order]
SD8494 Subnet mask setting [Low-order] This register stores the subnet mask. R/W
SD8495 Subnet mask setting [High-order]
SD8496 Default gateway IP address setting [Low-order] This register stores the default gateway IP
address.
R/W
SD8497 Default gateway IP address setting [High-order]
SD8498 IP address storage area write error code This register stores error codes if writing to IP
address storage area is failed.
R
SD8499 IP address storage area clear error code This register stores error codes if clear to IP
address storage area is failed.
R
No. Name Description Compatible CPU module R/W
FX5S FX5UJ FX5U/
FX5UC
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