USB and PCI Express
NVIDIA Jetson Nano DG-09502-001_v2.1 | 24
Parameter Requirement Units Notes
Trace Spacing (Stripline/Microstrip) pair – pair
To plane and capacitor pad
To unrelated high-speed signals
3x / 4x
3x / 4x
3x / 4x
Dielectric See Note 2
Length/Skew
Trace loss characteristic @ 2.5 GHz < 0.7 dB/in
The following max length is derived based on this
characteristic. See Note 3
Breakout region (max length) 41.9 ps
Minimum width and spacing. 4x or wider
dielectric height spacing is preferred
Max trace length/delay 5.5 (880) in (ps)
Max PCB via distance from the BGA 41.9 ps Max distance from BGA ball to first PCB via.
PCB within pair (intra-pair) skew 0.15 (0.5) mm (ps)
Do trace length matching before hitting
discontinuities
Within pair (intra-pair) matching between subsequent
discontinuities
0.15 (0.5) mm (ps)
Differential pair uncoupled length 41.9 ps
Via
Via placement
Place
vias as symmetrically as possible to data pair vias.
via distance should be placed
less than 1x the diff pair via pitch
Max # of vias PTH vias
Micro-vias
2 for TX traces and 2 for RX trace
No requirement
Max via stub length 0.4
mm
Longer via stubs would require review
Routing signals over antipads Not allowed
AC Cap
Value Min/Max 0.075 / 0.2
uF
Only required for TX pair when routed to
connector
Location (max length to adjacent discontinuity) 8
mm
Discontinuity such as edge finger, component pad
Voiding
Voiding the plane directly under the pad 3-4
mils larger than the pad size is
recommended.
See Figure 6-8
General: See Chapter 15 for guidelines related to serpentine routing, routing over voids and noise coupling
Notes:
1. The PCIe spec. has 40-60Ω absolute min/max trace impedance, which can be used instead of the 50Ω, ± 15%.
2. If routing in the same layer is necessary, route group TX and RX separately without mixing RX/TX routes and keep distance between nearest TX/RX trace
and RX to other signals 3x RX-RX separation.
3. Longer trace lengths may be possible if the total trace loss is equal to or better than the target. If the loss is greater, the max trace lengths will need to
be reduced.
4. Do length matching before via transitions to different layers or any discontinuity to minimize common mode conversion.