Sanyo PLC HF10000L - Projector Lamp Replacement Procedure

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Electrical Adjustment
Grp / No. Item Function Range Initial Note
66 YE_GAIN_C0 0 - 511 300
67 YE_GAIN_C1 0 - 511 278
68 YE_GAIN_C2 0 - 511 207
69 YE_GAIN_C3 0 - 511 120
70 YE_GAIN_C4 0 - 511 100
71 YEOFF_YE_SW 0 - 1 1
72 YEOFF_YE_LVL 0 - 255 255
73 COLOR_AJY 0 - 16383 128
83 FINE FPGA Sharpnes
0 Sharpness MIN [PC-SD] 0 - 127 0
1 Sharpness MIN [PC-HD] 0 - 127 0
2 Sharpness MIN [AV-SD] 0 - 127 0
3 Sharpness MIN [AV-HD] 0 - 127 0
4 Sharpness CENTER [PC-SD] 0 - 127 35
5 Sharpness CENTER [PC-HD] 0 - 127 30
6 Sharpness CENTER [AV-SD] 0 - 127 46
7 Sharpness CENTER [AV-HD] 0 - 127 35
8 Sharpness MAX [PC-SD] 0 - 127 100
9 Sharpness MAX [PC-HD] 0 - 127 100
10 Sharpness MAX [AV-SD] 0 - 127 77
11 Sharpness MAX [AV-HD] 0 - 127 70
84 FINE FPGA - Blending
0 BKMOD
0: Blending Mode (NORMAL) Layered Disable
1: Blending Mode (BLANKINK)Layered Disable
2: Blending Mode (NORMAL)Layered Enable
3: Blending Mode (BLANKING)Layered Enable
0 - 3 3
1 BLD_I_SIZE_H Inner Frame Width H 0 - 255 0
2 BLD_I_SIZE_V Inner Frame Width V 0 - 255 0
3 BLD_CURVE Curve 0 - 255 0
4 RGB_GAIN PC-Standard 0 - 511 256
5 RGB_GAIN PC-Real 0 - 511 256
6 RGB_GAIN PC-Dynamic 0 - 511 256
7 RGB_GAIN AV-Standard 0 - 511 256
8 RGB_GAIN AV-Cinema 0 - 511 256
9 RGB_GAIN AV-Dynamic 0 - 511 256
10 Bld_Exp_Int PC-Standard 0 -255 125
11 Bld_Exp_Int PC-Real 0 -255 125
12 Bld_Exp_Int PC-Dynamic 0 -255 125
13 Bld_Exp_Int AV-Standard 0 -255 125
14 Bld_Exp_Int AV-Cinema 0 -255 125
15 Bld_Exp_Int AV-Dynamic 0 -255 125
16 Bld_off_mult PC-Standard 0 -255 64
17 Bld_off_mult PC-Real 0 -255 64
18 Bld_off_mult PC-Dynamic 0 -255 64
19 Bld_off_mult AV-Standard 0 -255 64
20 Bld_off_mult AV-Cinema 0 -255 64
21 Bld_off_mult AV-Dynamic 0 -255 64
85 AV FPGA Dot Clock Rate
1 PC-Dot Clock Rate Slot-DIgtal 1002
2 AV-Dot Clock Rate Slot-DIgital 1002
86 MOTHER FPGA DLYCNT
0 DLYCNT (SLOT1) SLOT1 Clock Phase [DVI-Dsub] 0 - 255 7
1 DLYCNT (SLOT1) SLOT1 Clock Phase [HDCP-DVI] 0 - 255 7
2 DLYCNT (SLOT1) SLOT1 Clock Phase [Dual Fanc-SDI] 0 - 255 3
3 DLYCNT (SLOT1) SLOT1 Clock Phase [Dual Link-SDI] 0 - 255 3
4 DLYCNT (SLOT1) SLOT1 Clock Phase [AMIMON] 0 - 255 3
5 DLYCNT (SLOT1) SLOT1 Clock Phase [Reserved] 0 - 255 1
6 DLYCNT (SLOT1) SLOT1 Clock Phase [Reserved] 0 - 255 1
7 DLYCNT (SLOT1) SLOT1 Clock Phase [Reserved] 0 - 255 1
8 DLYCNT (SLOT1) SLOT1 Clock Phase [Reserved] 0 - 255 1
9 DLYCNT (SLOT1) SLOT1 Clock Phase [Reserved] 0 - 255 1
10 DLYCNT (SLOT2) SLOT2 Clock Phase [DVI-Dsub] 0 - 255 7
11 DLYCNT (SLOT2) SLOT2 Clock Phase [HDCP-DVI] 0 - 255 7
12 DLYCNT (SLOT2) SLOT2 Clock Phase [Dual Fanc-SDI] 0 - 255 3
13 DLYCNT (SLOT2) SLOT2 Clock Phase [Dual Link-SDI] 0 - 255 3
14 DLYCNT (SLOT2) SLOT2 Clock Phase [AMIMON] 0 - 255 3
15 DLYCNT (SLOT2) SLOT2 Clock Phase [Reserved] 0 - 255 1