10.11
Date Code 20080918 Instruction Manual SEL-749M Relay
Testing and Troubleshooting
Self-Test
Self-Test
The SEL-749M runs a variety of self-tests. Two Relay Word bits, HALARM
and SALARM, signal self-test problems. SALARM is pulsed for software-
programmed conditions; these include settings changes, access level changes,
and three consecutive unsuccessful password entry attempts. HALARM is
pulsed for hardware self-test warnings. HALARM is continuously asserted
(set to logical 1) for hardware self-test failures. A diagnostic alarm may be
configured as explained in Section 4: Protection and Logic Functions.
Table 10.8 lists hardware self-tests. In the Alarm Status column, Latched
indicates that HALARM is continuously asserted, Not Latched indicates that
HALARM is pulsed for 5 seconds, and NA indicates that HALARM is not
asserted.
All hardware self-test failures generate a front-panel message that is
automatically sent to the serial port. All hardware self-test failures (Latched
entry in Alarm Status column) disable the relay.
Table 10.8 Relay Self-Tests (Sheet 1 of 2)
Self-Test Description Limits
Protection
Disabled on
Fa i l ure
Alarm
Status
Front-Panel Message
on Failure
External RAM
(power up)
Performs a read/write test on
system RAM
Yes Latched Status Fail
RAM Failure
External RAM
(run time)
Performs a read/write test on
system RAM
Yes Latched Status Fail
RAM Failure
Internal RAM
(power up)
Performs a read/write test on
CPU RAM
Yes Latched Status Fail
RAM Failure
Internal RAM
(run time)
Performs a read/write test on
CPU RAM
Yes Latched Status Fail
RAM Failure
Critical RAM
(settings)
Performs a checksum test on
the active copy of settings
Checksum Yes Latched Status Fail
CR_RAM Failure
Code RAM
(run time)
Verify instruction matches
FLASH image
Yes Latched Status Fail
CR_RAM Failure
Code Flash
(power up)
SEL
BOOT qualifies code with a
checksum
Checksum NA NA
Code Flash
(run time)
Checksum is computed on the
entire code base
Checksum Yes Latched Status Fail
ROM Failure
Data Flash
(power up)
Checksum is computed on crit-
ical data
Checksum Yes Latched Status Fail
Non_Vol Failure
Data Flash
(run time)
Checksum is computed on crit-
ical data
Checksum Yes Latched Status Fail
Non_Vol Failure
Front Panel
(power up)
Fail if ID registers do not
match expected or if FPGA
programming is unsuccessful
No Not Latched
I/O Board Failure Check if ID register matches
part number
Yes Latched Status Fail
I/O Card Failure
DeviceNet
Board Failure
DeviceNet card does not
respond in three consecutive
300 ms time out periods
NA NA COMMFLT
Warning
Courtesy of NationalSwitchgear.com
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