ABB ACSM1 - Page 180

Parameters and firmware blocks
180
33.09 SUPERV3 FUNC FW block: SUPERVISION (see above)
Selects the mode of supervision 3.
(0) Disabled Supervision 3 not in use.
(1) Low When the signal selected by parameter 33.10 SUPERV3 ACT falls
below the value of parameter 33.12 SUPERV3 LIM LO, bit 2 of 6.14
SUPERV STATUS is activated. To clear the bit, the signal must
exceed the value of parameter 33.11 SUPERV3 LIM HI.
(2) High When the signal selected by parameter 33.10 SUPERV3 ACT
exceeds the value of parameter 33.11 SUPERV3 LIM HI, bit 2 of 6.14
SUPERV STATUS is activated. To clear the bit, the signal must fall
below the value of parameter 33.12 SUPERV3 LIM LO.
(3) Abs Low When the absolute value of the signal selected by parameter 33.10
SUPERV3 ACT falls below the value of parameter 33.12 SUPERV3
LIM LO, bit 2 of 6.14 SUPERV STATUS is activated. To clear the bit,
the absolute value of the signal must exceed the value of parameter
33.11 SUPERV3 LIM HI.
(4) Abs High When the absolute value of the signal selected by parameter 33.10
SUPERV3 ACT exceeds the value of parameter 33.11 SUPERV3 LIM
HI, bit 2 of 6.14 SUPERV STATUS is activated. To clear the bit, the
absolute value of the signal must fall below the value of parameter
33.12 SUPERV3 LIM LO.
33.10 SUPERV3 ACT FW block: SUPERVISION (see above)
Selects the signal to be monitored by supervision 3. See parameter 33.09 SUPERV3 FUNC.
Value pointer: Group and index
33.11 SUPERV3 LIM HI FW block: SUPERVISION (see above)
Sets the upper limit for supervision 3. See parameter 33.09 SUPERV3 FUNC.
-32768…32768 Upper limit for supervision 3.
33.12 SUPERV3 LIM LO FW block: SUPERVISION (see above)
Sets the lower limit for supervision 3. See parameter 33.09 SUPERV3 FUNC.
-32768…32768 Lower limit for supervision 3.
33.17 BIT0 INVERT SRC FW block: None
Parameters 33.17...33.22 enable the inversion of freely selectable source bits. The inverted bits are
shown by parameter 6.17 BIT INVERTED SW.
This parameter selects the source bit whose inverted value is shown by parameter 6.17 BIT
INVERTED SW, bit 0.
DI1 Digital input DI1 (as indicated by 2.01 DI STATUS, bit 0).
DI2 Digital input DI2 (as indicated by 2.01 DI STATUS, bit 1).
DI3 Digital input DI3 (as indicated by 2.01 DI STATUS, bit 2).