GR740-UM-DS, Nov 2017, Version 1.7 17 www.cobham.com/gaisler
GR740
The GR740 has the following on-chip functions:
• 4x LEON4 SPARC V8 processor cores with MMU and GRFPU floating-point unit
• Level-2 cache, 4-ways, BCH protection, supports locking of 1-4 ways
• Debug Support Unit (DSU) with instruction (512 lines) and AHB trace (256 lines) buffers
• Ethernet, JTAG and SpaceWire debug communication links
• 96-bit PC100 SDRAM memory controller with Reed-Solomon EDAC
• Hardware memory scrubber
• 8/16-bit PROM/IO controller with BCH EDAC
• I/O Memory Management Unit (IOMMU) with support for eight groups of DMA units
• 8-port SpaceWire router/switch with four on-chip AMBA ports with RMAP
• SpaceWire TDP controller
• 2x 10/100/1000 Mbit Ethernet MAC
• 32-bit 33 MHz PCI master/target interface with DMA engine
• MIL-STD-1553B interface controller
• 2x CAN 2.0B controllers
•2x UART
• SPI master/slave controller
• Interrupt controller with extended support for asymmetric multiprocessing
• 1x Timer unit with five timers, time latch/set functionality and watchdog functionality
• 4x Timer unit with four timers and time latch/set functionality
• Separate AHB and PCI trace buffers
• Temperature sensor
• Clock gating unit
• LEON4 statistics unit (performance counters)
• Pad and PLL control unit
• AHB status registers
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