GR740-UM-DS, Nov 2017, Version 1.7 251 www.cobham.com/gaisler
GR740
Table 299.GR1553B RT Descriptor format
Offset Value DMA R/W
0x00 Control and status word, see table 300 R/W
0x04 Data buffer pointer, 16-bit aligned R
0x08 Pointer to next descriptor, 16-byte aligned
or 0x0000003 to indicate end of list
R
Table 300. GR1553B RT Descriptor control/status word (offset 0x00)
31 30 29 26 25 10 9 8 3 2 0
DV IRQEN Reserved (0) TTIME BC SZ TRES
31 Data valid (DV) - Should be set to 0 by software before and set to 1 by hardware after transfer.
If DV=1 in the current receive descriptor before the receive transfer begins then a descriptor table error will
be triggered. You can override this by setting the IGNDV bit in the subaddress table.
30 IRQ Enable override (IRQEN) - Log and IRQ after transfer regardless of SA control word settings
Can be used for getting an interrupt when nearing the end of a descriptor list.
29 : 26 Reserved - Write 0 and mask out on read for forward compatibility
25 : 10 Transmission time tag (TTIME) - Set by the core to the value of the RT timer when the transfer finished.
9 Broadcast (BC) - Set by the core if the transfer was a broadcast transfer
8 : 3 Transfer size (SZ) - Count in 16-bit words (0-32)
2 : 0 Transfer result (TRES)
000 = Success
001 = Superseded (canceled because a new command was given on the other bus)
010 = DMA error or memory timeout occurred
011 = Protocol error (improperly timed data words or decoder error)
100 = The busy bit or message error bit was set in the transmitted status word and no data was sent
101 = Transfer aborted due to loop back checker error
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