GR740-UM-DS, Nov 2017, Version 1.7 256 www.cobham.com/gaisler
GR740
Table 311. 0x44 - BCA - GR1553B BC Action Register
31 1615 10987543210
BCKEY RESERVED ASSTP ASSRT RESERVED CLRT SETT SCSTP SCSUS SCSRT
- - -- - -----
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31 : 16 Safety code (BCKEY) - Must be 0x1552 when writing, otherwise register write is ignored
15: 10 RESERVED
9 Asynchronous list stop (ASSTP) - Write ‘1’ to stop asynchronous list (after current transfer, if executing)
8 Asynchronous list start (ASSRT) - Write ‘1’ to start asynchronous list
7: 5 RESERVED
4 Clear external trigger (CLRT) - Write ‘1’ to clear trigger memory
3 Set external trigger (SETT) - Write ‘1’ to force the trigger memory to set
2 Schedule stop (SCSTP) - Write ‘1’ to stop schedule (after current transfer, if executing)
1 Schedule suspend (SCSUS) - Write ‘1’ to suspend schedule (after current transfer, if executing)
0 Schedule start (SCSRT) - Write ‘1’ to start schedule
Table 312. 0x48 - BCTNP - GR1553B BC Transfer list next pointer register
31 0
SCHEDULE TRANSFER LIST POINTER
0x00000000
rw
31 : 0 Read: Currently executing (if SCST=001) or next transfer to be executed in regular schedule.
Write: Change address. If running, this will cause a jump after the current transfer has finished.
Table 313. 0x4C - BCANP- GR1553B BC Asynchronous list next pointer register
31 0
ASYNCHRONOUS LIST POINTER
0x00000000
rw
31 :0 Read: Currently executing (if ASST=01) or next transfer to be executed in asynchronous schedule.
Write: Change address. If running, this will cause a jump after the current transfer has finished.
Table 314. 0x50 - BCT - GR1553B BC Timer register
31 24 23 0
RESERVED SCHEDULE TIME (SCTM)
0x00 0x000000
rr
31: 24 RESERVED
23: 0 Schedule Time (SCTM) - Elapsed “transfer list” time in microseconds (read-only)
Set to zero when schedule is stopped or on external sync.
Table 315. 0x58 - BCRP - GR1553B BC Transfer-triggered IRQ ring position register
31 0
BC IRQ SOURCE POINTER RING POSITION
0x00000000
rw
31 : 0 The current write pointer into the transfer-tirggered IRQ descriptor pointer ring.
Bits 1:0 are constant zero (4-byte aligned)
The ring wraps at the 64-byte boundary, so bits 31:6 are only changed by user