GR740-UM-DS, Nov 2017, Version 1.7 278 www.cobham.com/gaisler
GR740
17.9.16 Receive Channel Read Register [CanRxRD]
Table 355.0x310 - CanRxRD - Receive Channel Read Register
The field is implemented as relative to the buffer base address (scaled with the SIZE field).
The READ field is written to in order to release the receive buffer, indicating the position +1 of the
last message that has been read out.
Note that it is not possible to fill the buffer. There is always one message position in buffer unused.
Software is responsible for not over-reading the buffer on wrap around (i.e. setting WRITE=READ).
17.9.17 Receive Channel Interrupt Register [CanRxIRQ]
Table 356.0x314 - CanRxIRQ - Receive Channel Interrupt Register
Note that this indicates that a programmed number of messages have been received.
The field is implemented as relative to the buffer base address (scaled with the SIZE field).
17.9.18 Receive Channel Mask Register [CanRxMASK]
Table 357.0x318 - CanRxMASK - Receive Channel Mask Register
Note that Base ID is bits 28 to 18 and Extended ID is bits 17 to 0.
17.9.19 Receive Channel Code Register [CanRxCODE]
Table 358.0x31C - CanRxCODE - Receive Channel Code Register
Note that Base ID is bits 28 to 18 and Extended ID is bits 17 to 0.
31 20 19 4 3 0
READ
0
rw
19: 4 READ - Pointer to last read message +1
31 20 19 4 3 0
IRQ
0
rw
19: 4 IRQ - Interrupt is generated when CanRxWR.WRITE=IRQ, as a consequence of a message recep-
tion
31 29 28 0
AM
0x1FFFFFFF
rw
28: 0 Acceptance Mask (AM) - Bits set to 1b are taken into account in the comparison between the
received message ID and the CanRxCODE.AC field
31 29 28 0
AC
0
rw
28: 0 Acceptance Code (AC) - Used in comparison with the received message
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