GR740-UM-DS, Nov 2017, Version 1.7 411 www.cobham.com/gaisler
GR740
35.5.1 Address comparison and channel selection
Packets are received to different channels based on the address and whether a channel is enabled or
not. When the receiver N-Char FIFO contains one or more characters, N-Chars are read by the
receiver DMA engine. The first character is interpreted as the logical address and is compared with
the addresses of each channel starting from 0. The packet will be stored to the first channel with an
matching address. The complete packet including address and protocol ID but excluding EOP/EEP is
stored to the memory address pointed to by the descriptors (explained later in this section) of the
channel.
Each SpaceWire address register has a corresponding mask register. Only bits at an index containing a
zero in the corresponding mask register are compared. This way a DMA channel can accept a range of
addresses. There is a default address register which is used for address checking in all implemented
DMA channels that do not have separate addressing enabled and for RMAP commands in the RMAP
target. With separate addressing enabled the DMA channels’ own address/mask register pair is used
instead.
If an RMAP command is received it is only handled by the target if the default address register
(including mask) matches the received address. Otherwise the packet will be stored to a DMA channel
if one or more of them has a matching address. If the address does not match neither the default
address nor one of the DMA channels’ separate register, the packet is still handled by the RMAP tar-
get if enabled since it has to return the invalid address error code. The packet is only discarded (up to
and including the next EOP/EEP) if an address match cannot be found and the RMAP target is dis-
abled.
Packets, other than RMAP commands, that do not match neither the default address register nor the
DMA channels’ address register will be discarded. Figure 50 shows a flowchart of packet reception.
At least 2 non EOP/EEP N-Chars needs to be received for a packet to be stored to the DMA channel
unless the promiscuous mode is enabled in which case 1 N-Char is enough. If it is an RMAP packet
with hardware RMAP enabled 3 N-Chars are needed since the command byte determines where the
packet is processed. Packets smaller than these sizes are discarded.
35.5.2 Basic functionality of a channel
Reception is based on descriptors located in a consecutive area in memory that hold pointers to buf-
fers where packets should be stored. When a packet arrives at the core the channel which should
receive it is first determined as described in the previous section. A descriptor is then read from the
channels’ descriptor area and the packet is stored to the memory area pointed to by the descriptor.
Lastly, status is stored to the same descriptor and increments the descriptor pointer to the next one.
The following sections will describe DMA channel reception in more detail.
35.5.3 Setting up the core for reception
A few registers need to be initialized before reception to a channel can take place. First the link inter-
face need to be put in the run state before any data can be sent. The DMA channel has a maximum
length register which sets the maximum packet size in bytes that can be received to this channel.
Larger packets are truncated and the excessive part is spilled. If this happens an indication will be
given in the status field of the descriptor. The minimum value for the receiver maximum length field
is 4 and the value can only be incremented in steps of four bytes up to the maximum value 33554428.
If the maximum length is set to zero the receiver will not function correctly.
Either the default address register or the channel specific address register (the accompanying mask
register must also be set) needs to be set to hold the address used by the channel. A control bit in the
DMA channel control register determines whether the channel should use default address and mask
registers for address comparison or the channel’s own registers. Using the default register the same
address range is accepted as for other channels with default addressing and the RMAP target while the
separate address provides the channel its own range. If all channels use the default registers they will
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