CYG PRS-7367 - Settings

Protection Functions
132 PRS-7367
1
SIG25SYN_Chk_OK
SIG 25SYN_DdChk_OK
SIG 25SYN_SynChk_OK
25SYN_NoChk SET
Figure 3.23-3 Logic diagram of Synchronism Output
3.23.4 Settings
Table 3.23-3 25SYN Settings
NO
Name
Values(Range)
Unit
Step
Defa
ult
Description
1
25SYN_NoChk
0 or 1
0
Enabling/disabling 79AR without any
check
0: disable
1: enable
2
25SYN_DL_DB
0 or 1
0
Enabling/disabling dead line and dead
bus (DLDB) check
0: disable
1: enable
3
25SYN_DL_LB
0 or 1
0
Enabling/disabling dead line and live
bus (DLLB) check
0: disable
1: enable
4
25SYN_LL_DB
0 or 1
0
Enabling/disabling live line and dead
bus (LLDB) check
0: disable
1: enable
5
25SYN_Syn
0 or 1
0
Enabling/disabling synchronism check
0: disable
1: enable
6
25SYN_OV
55.7~110.00
V
0.01
110
Threshold of over voltage for
synchronism blocking
7
25SYN_UV
0.01~66.4
V
0.01
40
Threshold of under voltage for
synchronism blocking
8
25SYN_OF
0~65
Hz
0.01
65
Threshold of over frequency for
synchronism blocking
9
25SYN_UF
0~65
Hz
0.01
45
Threshold of under frequency for
synchronism blocking
10
25SYN_Vol_Dd
0.01~110.00
V
0.01
30
Voltage threshold of dead check
11
25SYN_Vol_Lv
0.01~110.00
V
0.01
40
Voltage threshold of live check
12
25SYN_Ang_Diff
2~ 89
deg
0.01
25
Phase difference limit of synchronism
check for 79AR